Functional Verification Internship
About the Internship
Join Synopsys as a Verification Intern in the DDR IP Verification team and gain hands-on experience in functional verification of DDR PHY IP. This 1-year internship offers an opportunity to work on cutting-edge technology while enhancing your skills in Verilog/System Verilog, C/C++, and scripting languages.
As part of the role, you will collaborate with experienced professionals, receive in-depth training, and contribute to the verification process of high-performance memory IP. This internship is ideal for candidates passionate about digital electronics and memory organization.
Skills Required
Mandatory:
Proficiency in Verilog or System Verilog.
Knowledge of scripting languages like Tcl, Perl, or shell scripting.Solid understanding of digital electronics.
Good to Have:
Experience with C/C++ programming.
Strong object-oriented programming skills.
Understanding of computer memory organization.
Who can apply
- Recent graduates (B.Tech) with no prior work experience.
- Candidates with a strong academic background in digital electronics.
- Location: Bangalore, Karnataka, India
About Company
Synopsys is a global leader in electronic design automation (EDA) and semiconductor intellectual property (IP) solutions. For decades, the company has been driving innovation in design and verification, helping engineers build high-performance systems and chips. Synopsys fosters an inclusive and diverse work environment that values collaboration, learning, and growth. With a commitment to pushing the boundaries of technology, Synopsys offers opportunities to work on groundbreaking projects that shape the future of electronics and computing.
